Cache
Memory: - Cache memory is one of
the fast and small memory. It is placed between the CPU and main memory. The
access time of cache memory is less than main memory by the factor of 5 to 10.
Cache is the fastest component in the memory hierarchy and approaches the speed
of CPU components. The operation of cache memory is as follows: When CPU needs
access memory. The cache is examined. If the word is found in the cache it is
accessed from cache memory. If word is no found in the cache memory, then it is
accessed from main memory.
The performance of cache memory is frequently
measured in terms of quantity called hit
ratio. When CPU refers to memory and finds the word in cache, it is said to
produce a hit. If the word is not
found in cache, it is in the main memory and it counts as a miss. The basic characteristics of cache memory is its fast access
time.
Mapping:
- The transformation of
data from main memory to cache memory is referred to as a mapping process. Each memory address maps to exactly one set in the
cache. Some of the address bits are used to determine which cache set contains
the data. If the set contains more than one block, the data may be kept in any
of the blocks in the set.
Three
types of mapping procedures are of practical interest when considering the
organization of cache memory:
- Associative mapping
- Direct mapping
- Set-associative mapping
Associative
mapping: - The
fastest and most flexible cache organization uses an associative memory. The
associative mapping stores both the address and data of the memory word. This
permits any location in cache to store any word from main memory.
Caches are classified as either write-through cache or write-back cache. Modern caches are
usually write-back, because main memory access time is so large.
·
In
a write through cache, the data written to a cache block is simultaneously
written to main memory. A write-through cache requires no dirty bit but usually
requires more main memory writes
·
In
a write-back cache, a dirty bit (D) is associated with each cache block
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